The demand for higher performance, microcontroller-based products for use in communication and processing applications continues to increase rapidly. As a result, microcontroller-based product manufacturers are requiring for the components and devices within these products to be continually improved to meet the design requirements of a myriad of emerging audio, video and imaging applications.
These microcontroller-based products use various types of processors, for example, general purpose microprocessors for controlling the logic of various digital devices, such as clock radios, microwave ovens, digital video recorders and the like, and special purpose microprocessors, such as math coprocessors for mathematical computations, or digital signal processors used in manipulating various types of information, including sound, imaging and video information.
The microcontroller typically includes a central processing unit (CPU) core for the processing functions, and a bus interface for communication with the various memory devices as well as external or other peripheral devices.
For the transmitting and receiving of data between various devices and components, microprocessors and other devices utilize various types of serial interfaces. One such type of interface definition typically used is the serial peripheral interface (SPI). In addition, for the temporary storage of data, for example, to permit the microprocessors to manipulate the data before transferring the data through the SPI to another device, the microprocessors generally utilize one or more buffers. These buffers are configured with the SPI's to enable the processors to transmit and receive data to and from the buffers as needed in an application.
For the storage of data, the microprocessor can include various types of memory. For example, the CPU for the microcontroller may include Random Access Memory (RAM) as well as Read-Only Memory (ROM), i.e., programmed memory. In addition, the microcontroller can also include flash memory which can be erased and preprogrammed in blocks instead of being programmed one byte at a time.
In a typical microprocessor system arrangement, the microprocessor may include various conventional port structures for connecting to peripheral devices, such as, I/O devices, memory devices, and the like. Accordingly, each port function (e.g., mode) may be identified by a pull-up resistor with relation to the port output pin. Various port arrangements and pull-up resistor positions are well known in the art. For examples of conventional port arrangements and port modes, please see U.S. Pat. No. 6,199,128 issued to Sarat on Mar. 3, 2001, U.S. Pat. No. 6,134,167 issued to Atkinson on Oct. 17, 2000 and U.S. Pat. No. 6,073,167 issued to Murray, et al. on Jun. 6, 2000.
In low speed I/O implementations, a pull-up resistor is typically connected to an output pin. These pull-up resistors, however, are often characterized by speed versus power limitations. In particular, if the pull-up resistance is high, the current is low and the CPU clock speed is slow, which results in low static power. On the other hand, if the pull-up resistance is low, the CPU clock speed is high, but power is generally sacrificed.
Further, in existing high-speed I/O implementations, power dissipation can be reduced through the use of different pull-up strengths at different machine cycle times. For example, where four machine cycles exist (e.g., C1, C2, C3, C4), and the memory access mode occurs with respect to machine cycle C1, then a weak pull-up resistance is used for C1 and a strong pull-up resistance is used for machine cycles C2-C4. In this case, high power dissipation will only occur with respect to C1, when processing speed is most critical. It is important to note, however, the overall CPU processing speed is still diminished by the I/O speed which occurs with respect to C2-C4.
Accordingly, a need exists for an improved external memory interface system which does not compromise between high speed and low power in I/O when the device is in memory mode. Further, a need exists for such a system to include no additional configuration pins, and therefore not resulting in an increase in the cost of the overall system.